title: Layout of a multiplexed electrode VLSI circuit for monitoring evoked responses in cerebral cortex.
abstract: This paper summarizes the details of the design of an integrated circuit layout usable as a multiple-electrode implantable cerebral cortex sensor. The purpose of implanting multiplexed electrode circuits in a cerebral cortex is to monitor the electroencephalograph (EEG) and visual evoked response (VER) generated while the subject performs normal visual functions. A summary of the human image processing system is given as a background for the circuit design work. A typical subject for the research would be a laboratory animal. External power, clocking, and analogue data lines required for its operation posed problems for the original electrode chip. The second generation brain chip includes self contained-power with on-board multiplexing and clocking circuits. The most significant improvement is the incorporation of analogue to digital (A/D) converters. Through the use of A/D converters, brain signal data can be converted at the site of implant, eliminating induced noise from analogue wires used on the original chip. Conversion at the implant site, the primary visual cortex, yields a more accurate indication of the actual brain data.
authors: Bradley Department of Electrical Engineering, Virginia Polytechnic Institute and State University, Blacksburg 24061.
authors: J G
authors: JG
authors: Tront
authors: J C
authors: JC
authors: McKeeman
mesh_terms: D002540:Cerebral Cortex / Q000502:physiology*; D004567:Electrodes, Implanted; D004569:Electroencephalography; D004867:Equipment Design; D005074:Evoked Potentials, Visual; D006801:Humans; D008839:Microelectrodes; D008991:Monitoring, Physiologic / Q000295:instrumentation*; D014173:Transistors, Electronic