title: Kakadu--a low power analogue neural network classifier.
abstract: An analogue neural network VLSI chip designed for low power operation is presented. This chip consists of 84 synapse elements arranged as arrays of size 10 x 6 and 6 x 4 and was fabricated using a standard 1.2 micron double metal single poly CMOS process. The synapses are digitally programmable and static weight storage is provided. The chip has a typical power consumption of tens of microwatts. It has been successfully trained and tested on a range of classification problems including 4-bit parity, character recognition and morphological-based classification of intracardiac electrogram signals.
authors.affiliation: Department of Electrical Engineering, University of Australia, NSW.
authors.forename: P H
authors.initials: PH
authors.lastname: Leong
authors.forename: M A
authors.initials: MA
authors.lastname: Jabri
mesh_terms: D000465:Algorithms; D000703:Analog-Digital Conversion; D001145:Arrhythmias, Cardiac / Q000145:classification; D002965:Classification; D003201:Computers; D016208:Databases, Factual; D006801:Humans; D016571:Neural Networks, Computer; D009474:Neurons; D012666:Semiconductors; D013569:Synapses