Neural networks in analog hardware--design and implementation issues.
This paper presents a brief review of some analog hardware implementations of neural networks. Several criteria for the classification of general neural networks implementations are discussed and a taxonomy induced by these criteria is presented. The paper also discusses some characteristics of analog implementations as well as some trade-offs and issues identified in the work reviewed. Parameters such as precision, chip area, power consumption, speed and noise susceptibility are discussed in the context of neural implementations. A unified review of various "VLSI friendly" algorithms is also presented. The paper concludes with some conclusions drawn from the analysis of the implementations presented.
Draghici
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Department of Computer Science, Wayne State University, Detroit, MI 48202, USA.
D001185:Artificial Intelligence; D003202:Computers, Analog; D016571:Neural Networks, Computer