title: Logic gates and computation from assembled nanowire building blocks.
abstract: Miniaturization in electronics through improvements in established "top-down" fabrication techniques is approaching the point where fundamental issues are expected to limit the dramatic increases in computing seen over the past several decades. Here we report a "bottom-up" approach in which functional device elements and element arrays have been assembled from solution through the use of electronically well-defined semiconductor nanowire building blocks. We show that crossed nanowire p-n junctions and junction arrays can be assembled in over 95% yield with controllable electrical characteristics, and in addition, that these junctions can be used to create integrated nanoscale field-effect transistor arrays with nanowires as both the conducting channel and gate electrode. Nanowire junction arrays have been configured as key OR, AND, and NOR logic-gate structures with substantial gain and have been used to implement basic computation.
authors.affiliation: Department of Chemistry and Chemical Biology, Division of Engineering and Applied Sciences, Harvard University, Cambridge, MA 02138, USA.
authors.forename: Y
authors.initials: Y
authors.lastname: Huang
authors.forename: X
authors.initials: X
authors.lastname: Duan
authors.forename: Y
authors.initials: Y
authors.lastname: Cui
authors.forename: L J
authors.initials: LJ
authors.lastname: Lauhon
authors.forename: K H
authors.initials: KH
authors.lastname: Kim
authors.forename: C M
authors.initials: CM
authors.lastname: Lieber