A majority-logic nanodevice using a balanced pair of single-electron boxes.
This paper describes a majority-logic gate device that will be useful in developing single-electron integrated circuits. The gate device consists of two identical single-electron boxes combined to form a balanced pair. It accepts three inputs and produces a majority-logic output by using imbalances caused by the input signals; it produces a 1 output if two or three inputs are 1, and a 0 output if two or three inputs are 0. We combine these gate devices into two subsystems, a shift register and an adder, and demonstrate their operation by computer simulation. We also propose a method of fabricating the unit element of the gate device, a minute dot with four coupling arms. We demonstrate by experiments that it is possible to arrange these unit elements on a GaAs substrate, in a self-organizing manner, by means of a process technology that is based on selective-area metalorganic vapor-phase epitaxy.
Oya
Takahide
T
Department of Electrical Engineering, Hokkaido University, Sapporo 060-8628, Japan.
Asai
Tetsuya
T
Fukui
Takashi
T
Amemiya
Yoshihito
Y
D000535:Aluminum / Q000737:chemistry; D001152:Arsenicals / Q000138:chemical synthesis / Q000737:chemistry; D003198:Computer Simulation; D003460:Crystallization / Q000379:methods*; D025802:Electric Capacitance; D004563:Electrochemistry / Q000295:instrumentation / Q000379:methods; D004581:Electronics / Q000295:instrumentation*; D004583:Electrons; D004867:Equipment Design; D005240:Feasibility Studies; D005708:Gallium / Q000737:chemistry; D008904:Miniaturization; D008962:Models, Theoretical; D036103:Nanotechnology / Q000295:instrumentation* / Q000379:methods; D012666:Semiconductors; D012815:Signal Processing, Computer-Assisted / Q000295:instrumentation*; D055672:Static Electricity
D001152:Arsenicals; C043055:gallium arsenide; D005708:Gallium; D000535:Aluminum