ACE16k: a 128x128 focal plane analog processor with digital I/O.
This paper presents a new generation 128x128 Focal-Plane Analog Programmable Array Processor -FPAPAP, from a system level perspective. It has been manufactured in a 0.35 microm standard digital 1P-5M CMOS technology. It has been designed to achieve the high-speed and moderate-accuracy -8b- requirements of most real time -early-vision applications. External data interchange and control are completely digital. The chip contains close to four million transistors, 90% of them working in analog mode. It achieves peak computing values of 0.33TeraOPS while keeping power consumption at reasonable limits -82.5GOPS/W. Preliminary experimental results are also provided in the paper.
Cembrano
Gustavo Liñan
GL
Instituto de Microelectrónica de Sevilla - CNM-CSIC- Universidad de Sevilla, Edificio CICA Avda. Reina Mercedes s/n 41012, Seville, Spain.
Rodríguez-Vázquez
Angel
A
Espejo Meana
Servando
S
Domínguez-Castro
Rafael
R
D003202:Computers, Analog / Q000639:trends; D016571:Neural Networks, Computer; D014785:Vision, Ocular / Q000502:physiology