Real-time face detection and lip feature extraction using field-programmable gate arrays.
This paper proposes a new technique for face detection and lip feature extraction. A real-time field-programmable gate array (FPGA) implementation of the two proposed techniques is also presented. Face detection is based on a naive Bayes classifier that classifies an edge-extracted representation of an image. Using edge representation significantly reduces the model's size to only 5184 B, which is 2417 times smaller than a comparable statistical modeling technique, while achieving an 86.6% correct detection rate under various lighting conditions. Lip feature extraction uses the contrast around the lip contour to extract the height and width of the mouth, metrics that are useful for speech filtering. The proposed FPGA system occupies only 15050 logic cells, or about six times less than a current comparable FPGA face detection system.
Nguyen
Duy
D
Department of Electrical and Computer Engineering, University of Toronto, ON, Canada.
Halupka
David
D
Aarabi
Parham
P
Sheikholeslami
Ali
A
D001185:Artificial Intelligence; D003199:Computer Systems; D004867:Equipment Design; D019544:Equipment Failure Analysis; D005145:Face / Q000033:anatomy & histology*; D006801:Humans; D007090:Image Interpretation, Computer-Assisted / Q000295:instrumentation* / Q000379:methods; D008046:Lip / Q000033:anatomy & histology*; D010363:Pattern Recognition, Automated / Q000379:methods*; D012815:Signal Processing, Computer-Assisted / Q000295:instrumentation*; D049250:Speech Recognition Software