title: Transmission electron microscopy characterization of the erbium silicide formation process using a Pt/Er stack on a silicon-on-insulator substrate.
abstract: Very thin erbium silicide layers have been used as source and drain contacts to n-type Si in low Schottky barrier MOSFETs on silicon-on-insulator substrates. Erbium silicide is formed by a solid-state reaction between the metal and silicon during annealing. The influence of annealing temperature (450 degrees C, 525 degrees C and 600 degrees C) on the formation of an erbium silicide layer in the Pt/Er/Si/SiO(2)/Si structure was analysed by means of cross-sectional transmission electron microscopy. The Si grains/interlayer formed at the interface and the presence of Si grains within the Er-related layer constitute proof that Si reacts with Er in the presence of a Pt top layer in the temperature range 450-600 degrees C. The process of silicide formation in the Pt/Er/Si structure differs from that in the Er/Si structure. At 600 degrees C, the Pt top layer vanishes and a (Pt-Er)Si(x) system is formed.
authors.affiliation: Institute of Electron Technology, al. Lotników 32/46, 02-668 Warsaw, Poland. laszcz@ite.waw.pl
authors.forename: A
authors.initials: A
authors.lastname: Łaszcz
authors.forename: J
authors.initials: J
authors.lastname: Katcki
authors.forename: J
authors.initials: J
authors.lastname: Ratajczak
authors.forename: Xiaohui
authors.initials: X
authors.lastname: Tang
authors.forename: E
authors.initials: E
authors.lastname: Dubois