A 64-channel ASIC for in-vitro simultaneous recording and stimulation of neurons using microelectrode arrays.
A 64 channels CMOS chip dedicated to in-vitro simultaneous recording and stimulation of neurons using microelectrode arrays has been developed. It includes, for each channel, a low noise, variable gain (10, 75 or 750), 0.08 Hz-3 kHz bandwidth measurement path with unity-gain for lower frequencies to allow measurement of the electrochemical potential. A snapshot style Sample & Hold circuitry allows to have "images" of the 64 channels at a maximum sampling frequency of 50 kHz. Input-referred noise of the measurement path is 4.3 microV RMS integrated from 0.08 Hz to 3 kHz. To get rid of the random, slowly varying, DC offset potential that exists at the electrode-electrolyte interface, the ASIC can be supplied with floating VSS, VDD. Circuit size is 2.4 mm per 11.2 mm (0.35 microm CMOS process) and its power consumption is about 125 mW.
Billoint
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CEA LETI - MINATEC, DCIS/SCME/LCIB, 17 rue des Martyrs, 38054 Grenoble cedex 9, France.
Rostaing
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JP
Charvet
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Yvert
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D000200:Action Potentials / Q000502:physiology*; D000669:Amplifiers, Electronic; D002478:Cells, Cultured; D004558:Electric Stimulation / Q000295:instrumentation* / Q000379:methods; D004867:Equipment Design; D019544:Equipment Failure Analysis; D006801:Humans; D008839:Microelectrodes; D009474:Neurons / Q000502:physiology*; D012666:Semiconductors; D012815:Signal Processing, Computer-Assisted / Q000295:instrumentation*