Analog recurrent decision circuit with high signal-voltage symmetry and delay-time equality to improve continuous-time convergence performance.
This paper reports experimental results showing that the recall dynamics of analog associative memories is largely influenced by signal-voltage symmetry of synaptic weights and inverse-noninverse delay-time equality of neurons. We propose a highly symmetric synapse and an equi-delaying neuron. We fabricated an association chip comprised of them to demonstrate a high association performance. In comparison experiments, we also observe large performance degradations when the symmetry or delay equality is deteriorated. We analyze the dynamics based on the statistics of recall results. The proposals and the analysis results are widely applicable to analog recurrent convergence circuits.
Hirose
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A
Dept. of Electr. and Electron. Eng., Tokyo Univ., Japan.
Nakazawa
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