The design of a neuro-microprocessor.
The architecture of a neuro-microprocessor is presented. This processor was designed using the results of careful analysis of a set of applications and extensive simulation of moderate-precision arithmetic for back-propagation networks. Simulated performance results and test-chip results for the processor are presented. This work is an important intermediate step in the development of a connectionist network supercomputer.
Wawrzynek
J
J
California Univ., Berkeley, CA.
Asanovic
K
K
Morgan
N
N