A 1.2V 1.5 microW 4 kS/s 10b Pipelined ADC for electroencephalogram applications.
This paper presents the design of a Pipelined Analog-to-Digital Converter (ADC) for Electroencephalogram (EEG) applications with 10 bits of resolution, 1.2V of supply voltage and only 1.5 microW of power consumption using a standard 0.5 microm CMOS technology. Low-voltage and low-power operation has been achieved using Quasi-Floating-Gate (QFG) based circuits. The use of a new class-AB operational amplifier in weak inversion allows very low power consumption and high enough open loop gain. Simulation results show an energy efficiency of 0.84 pJ per quantization level, placing the converter into the state-of-the-art of low-frequency low-power ADCs.
Garcia-Gonzalez
J M
JM
Grupo de Ingeniería Electrónica, Unversidad de Sevilla, Spain. Jose-Manuel.Garcia-Gonzalez@Micronas.com
Munoz
F
F
Carvajal
R G
RG
Lopez-Morillo
E
E
Elgmili
H
H
Aguilar-Pelaez
E
E
D000703:Analog-Digital Conversion; D044962:Data Compression / Q000379:methods*; D004569:Electroencephalography / Q000295:instrumentation*; D004867:Equipment Design; D019544:Equipment Failure Analysis; D015203:Reproducibility of Results; D012680:Sensitivity and Specificity; D012815:Signal Processing, Computer-Assisted / Q000295:instrumentation*