title: Autonomous gain verification algorithm for a dual mode digital hearing aid chip.
abstract: A dual mode digital hearing aid chip with real-time autonomous gain verifications algorithm is proposed and implemented. Four proposed gain models due to the different internal sound paths are analyzed to verify its usefulness. By adopting this algorithm, a real-ear aided gain and a real-ear occluded gain which considers internal vent effect and leakage path effect are compared with conventional models. To evaluate this algorithm the implemented chip adopts two different modes; a hearing aid mode and a gain verification mode for a hearing aid operation and internal gain verification, respectively. The minimum and maximum convergence time of the presented algorithm covers 0.05 s at a 1 kHz input signal and 1.6 s at a 7.5 kHz input signal, respectively. The implemented chip dissipates less than 130 microW at a supply voltage of 0.9 V and occupies a 5.4 mm(2) core are at a 0.18 microm CMOS technology.
authors.affiliation: Korea Advanced Institute of Science and technology, 373-1, Daejeon, 305-701, Republic of Korea. sunyoung@eeinfo.kaist.ac.kr
authors.forename: Sunyoung
authors.initials: S
authors.lastname: Kim
authors.forename: Long
authors.initials: L
authors.lastname: Yan
authors.forename: Minsu
authors.initials: M
authors.lastname: Kim
authors.forename: Joonsung
authors.initials: J
authors.lastname: Bae
authors.forename: Hoi-Jun
authors.initials: HJ
authors.lastname: Yoo
mesh_terms: D000465:Algorithms; D004867:Equipment Design; D005246:Feedback; D006310:Hearing Aids; D006801:Humans; D008954:Models, Biological; D017755:Prosthesis Fitting; D012815:Signal Processing, Computer-Assisted / Q000295:instrumentation*