Analytic model for low-frequency noise in nanorod devices.
In this work analytic model for generation of excess low-frequency noise in nanorod devices such as field-effect transistors are developed. In back-gate field-effect transistors where most of the surface area of the nanorod is exposed to the ambient, the surface states could be the major noise source via random walk of electrons for the low-frequency or 1/f noise. In dual gate transistors, the interface states and oxide traps can compete with each other as the main noise source via random walk and tunneling, respectively.
Lee
Jungil
J
Nano Device Research Center, Korea Institute of Science and Technology, 136-791 Seoul, Korea.
Yu
Byung Yong
BY
Han
Ilki
I
Choi
Kyoung Jin
KJ
Ghibaudo
Gerard
G