title: Growth of carbon nanotubes on fully processed silicon-on-insulator CMOS substrates.
abstract: This paper describes the growth of Carbon Nanotubes (CNTs) both aligned and non-aligned on fully processed CMOS substrates containing high temperature tungsten metallization. While the growth method has been demonstrated in fabricating CNT gas sensitive layers for high temperatures SOI CMOS sensors, it can be employed in a variety of applications which require the use of CNTs or other nanomaterials with CMOS electronics. In our experiments we have grown CNTs both on SOI CMOS substrates and SOI CMOS microhotplates (suspended on membranes formed by post-CMOS deep RIE etching). The fully processed SOI substrates contain CMOS devices and circuits and additionally, some wafers contained high current LDMOSFETs and bipolar structures such as Lateral Insulated Gate Bipolar Transistors. All these devices were used as test structures to investigate the effect of additional post-CMOS processing such as CNT growth, membrane formation, high temperature annealing, etc. Electrical characterisation of the devices with CNTs were performed along with SEM and Raman spectroscopy. The CNTs were grown both at low and high temperatures, the former being compatible with Aluminium metallization while the latter being possible through the use of the high temperature CMOS metallization (Tungsten). In both cases we have found that there is no change in the electrical behaviour of the CMOS devices, circuits or the high current devices. A slight degradation of the thermal performance of the CMOS microhotplates was observed due to the extra heat dissipation path created by the CNT layers, but this is expected as CNTs exhibit a high thermal conductance. In addition we also observed that in the case of high temperature CNT growth a slight degradation in the manufacturing yield was observed. This is especially the case where large area membranes with a diameter in excess of 500 microns are used.
authors.affiliation: Centre for Advanced Photonics and Electronics, University of Cambridge, Cambridge CB3 0FA, UK.
authors.forename: M Samiul
authors.initials: MS
authors.lastname: Haque
authors.forename: S Zeeshan
authors.initials: SZ
authors.lastname: Ali
authors.forename: P K
authors.initials: PK
authors.lastname: Guha
authors.forename: S P
authors.initials: SP
authors.lastname: Oei
authors.forename: J
authors.initials: J
authors.lastname: Park
authors.forename: S
authors.initials: S
authors.lastname: Maeng
authors.forename: K B K
authors.initials: KB
authors.lastname: Teo
authors.forename: F
authors.initials: F
authors.lastname: Udrea
authors.forename: W I
authors.initials: WI
authors.lastname: Milne
mesh_terms: D003460:Crystallization / Q000379:methods*; D004553:Electric Conductivity; D006358:Hot Temperature; D046911:Macromolecular Substances / Q000737:chemistry; D008422:Materials Testing; D008968:Molecular Conformation; D036103:Nanotechnology / Q000379:methods*; D037742:Nanotubes, Carbon / Q000737:chemistry* / Q000648:ultrastructure*; D010316:Particle Size; D012825:Silicon / Q000737:chemistry*; D013499:Surface Properties; D014173:Transistors, Electronic
chemical_list: D046911:Macromolecular Substances; D037742:Nanotubes, Carbon; D012825:Silicon