A binary-decision-diagram-based two-bit arithmetic logic unit on a GaAs-based regular nanowire network with hexagonal topology.
A two-bit arithmetic logic unit (ALU) was successfully fabricated on a GaAs-based regular nanowire network with hexagonal topology. This fundamental building block of central processing units can be implemented on a regular nanowire network structure with simple circuit architecture based on graphical representation of logic functions using a binary decision diagram and topology control of the graph. The four-instruction ALU was designed by integrating subgraphs representing each instruction, and the circuitry was implemented by transferring the logical graph structure to a GaAs-based nanowire network formed by electron beam lithography and wet chemical etching. A path switching function was implemented in nodes by Schottky wrap gate control of nanowires. The fabricated circuit integrating 32 node devices exhibits the correct output waveforms at room temperature allowing for threshold voltage variation.
Zhao
Hong-Quan
HQ
Research Center for Integrated Quantum Electronics, Hokkaido University, N13, W8, Sapporo 060-8628, Japan.
Kasai
Seiya
S
Shiratori
Yuta
Y
Hashizume
Tamotsu
T
D001152:Arsenicals / Q000737:chemistry*; D003460:Crystallization / Q000379:methods*; D004581:Electronics / Q000295:instrumentation*; D004867:Equipment Design; D019544:Equipment Failure Analysis; D005708:Gallium / Q000737:chemistry*; D046911:Macromolecular Substances / Q000737:chemistry; D008422:Materials Testing; D008433:Mathematics; D008968:Molecular Conformation; D049329:Nanostructures / Q000737:chemistry* / Q000648:ultrastructure; D036103:Nanotechnology / Q000295:instrumentation*; D010316:Particle Size; D012815:Signal Processing, Computer-Assisted / Q000295:instrumentation*; D013499:Surface Properties
D001152:Arsenicals; D046911:Macromolecular Substances; C043055:gallium arsenide; D005708:Gallium