title: A fully programmable computing architecture for medical ultrasound machines.
abstract: Application-specific ICs have been traditionally used to support the high computational and data rate requirements in medical ultrasound systems, particularly in receive beamforming. Utilizing the previously developed efficient front-end algorithms, in this paper, we present a simple programmable computing architecture, consisting of a field-programmable gate array (FPGA) and a digital signal processor (DSP), to support core ultrasound signal processing. It was found that 97.3% and 51.8% of the FPGA and DSP resources are, respectively, needed to support all the front-end and back-end processing for B-mode imaging with 64 channels and 120 scanlines per frame at 30 frames/s. These results indicate that this programmable architecture can meet the requirements of low- and medium-level ultrasound machines while providing a flexible platform for supporting the development and deployment of new algorithms and emerging clinical applications.
authors: Department of Electrical Engineering, University of Washington, Seattle, WA 98195-5061, USA. fabioks@utfpr.edu.br
authors: Fabio Kurt
authors: FK
authors: Schneider
authors: Anup
authors: A
authors: Agarwal
authors: Yang Mo
authors: YM
authors: Yoo
authors: Tetsuya
authors: T
authors: Fukuoka
authors: Yongmin
authors: Y
authors: Kim
mesh_terms: D001698:Biomedical Engineering; D003199:Computer Systems; D004867:Equipment Design; D007091:Image Processing, Computer-Assisted / Q000379:methods*; D014463:Ultrasonography / Q000295:instrumentation / Q000379:methods