title: Formation of single tiers of bridging silicon nanowires for transistor applications using vapor-liquid-solid growth from short silicon-on-insulator sidewalls.
abstract: Single tiers of silicon nanowires that bridge the gap between the short sidewalls of silicon-on-insulator (SOI) source/drain pads are formed. The formation of a single tier of bridging nanowires is enabled by the attachment of a single tier of Au catalyst nanoparticles to short SOI sidewalls and the subsequent growth of epitaxial nanowires via the vapor-liquid-solid (VLS) process. The growth of unobstructed nanowire material occurs due to the attachment of catalyst nanoparticles on silicon surfaces and the removal of catalyst nanoparticles from the SOI-buried oxide (BOX). Three-terminal current-voltage measurements of the structure using the substrate as a planar backgate after VLS nanowire growth reveal transistor behaviour characteristics.
authors.affiliation: Microsystems Technology Laboratories, Department of Electrical Engineering and Computer Science, Massachusetts Institute of Technology, Cambridge, MA 02139, USA. onayfeh@mit.edu
authors.forename: Osama M
authors.initials: OM
authors.lastname: Nayfeh
authors.forename: Dimitri A
authors.initials: DA
authors.lastname: Antoniadis
authors.forename: Steven
authors.initials: S
authors.lastname: Boles
authors.forename: Charles
authors.initials: C
authors.lastname: Ho
authors.forename: Carl V
authors.initials: CV
authors.lastname: Thompson
mesh_terms: D004581:Electronics; D053770:Nanowires; D012825:Silicon / Q000737:chemistry*
chemical_list: D012825:Silicon