Hafnium transistor process design for neural interfacing.
A design methodology is presented that uses 1-D process simulations of Metal Insulator Semiconductor (MIS) structures to design the threshold voltage of hafnium oxide based transistors used for neural recording. The methodology is comprised of 1-D analytical equations for threshold voltage specification, and doping profiles, and 1-D MIS Technical Computer Aided Design (TCAD) to design a process to implement a specific threshold voltage, which minimized simulation time. The process was then verified with a 2-D process/electrical TCAD simulation. Hafnium oxide films (HfO) were grown and characterized for dielectric constant and fixed oxide charge for various annealing temperatures, two important design variables in threshold voltage design.
Parent
David W
DW
SJSU. dparent@email.sjsu.edu
Basham
Eric J
EJ
D000200:Action Potentials / Q000502:physiology*; D000669:Amplifiers, Electronic; D004867:Equipment Design; D019544:Equipment Failure Analysis; D006195:Hafnium / Q000737:chemistry*; D009474:Neurons / Q000502:physiology*; D010087:Oxides / Q000737:chemistry*; D014173:Transistors, Electronic
D010087:Oxides; C545179:hafnium oxide; D006195:Hafnium