Biased resonance circuits for electrooptic digital deflectors.
A number of circuits for electrooptic digital deflectors is presented. These circuits minimize power dissipation by utilizing the novel technique called biased resonance. This technique is based on the coincidence of zero points of a raised cosine and its derivative. Test results are reported for one circuit that operated at 2200 V, with a load capacitance of 200 pF, and at greater than 100 k baud rate. Dissipation for this breadboard model was 10 W. Other circuits are shown; their advantages and disadvantages are discussed. Also discussed are some future switching device requirements.
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IBM Corporation, Systems Development Division, Poughkeepsie, New York 12602, USA.