A sub-picojoule-per-bit CMOS photonic receiver for densely integrated systems.
We report ultra-low-power (690fJ/bit) operation of an optical receiver consisting of a germanium-silicon waveguide detector intimately integrated with a receiver circuit and embedded in a clocked digital receiver. We show a wall-plug power efficiency of 690microW/Gbps for the photonic receiver made of a 130nm SOI CMOS Ge waveguide detector integrated to a 90nm Si CMOS receiver circuit. The hybrid CMOS photonic receiver achieved a sensitivity of -18.9dBm at 5Gbps for BER of 10(-12). Enabled by a unique low-overhead bias refresh scheme, the receiver operates without the need for DC balanced transmission. Small signal measurements of the CMOS Ge waveguide detector showed a 3dB bandwidth of 10GHz at 1V of reverse bias, indicating that further increases in transmission rate and reductions of energy-per-bit will be possible.
Zheng
Xuezhe
X
Sun Microsystems Physical Sciences Center, San Diego, CA 92121, USA. Xuezhe.zheng@sun.com
Liu
Frankie
F
Patil
Dinesh
D
Thacker
Hiren
H
Luo
Ying
Y
Pinguet
Thierry
T
Mekis
Attila
A
Yao
Jin
J
Li
Guoliang
G
Shi
Jing
J
Raj
Kannan
K
Lexau
Jon
J
Alon
Elad
E
Ho
Ron
R
Cunningham
John E
JE
Krishnamoorthy
Ashok V
AV
D004867:Equipment Design; D019544:Equipment Failure Analysis; D055096:Optical Devices; D010783:Photometry / Q000295:instrumentation*; D012666:Semiconductors; D012815:Signal Processing, Computer-Assisted / Q000295:instrumentation*; D018511:Systems Integration; D013685:Telecommunications / Q000295:instrumentation*