Microcontroller-based binary integrator for millimeter-wave radar experiments.
An easily on-site reconfigurable multiple binary integrator for millimeter radar experiments has been constructed of static random access memories, an eight bit microcontroller, and high speed video operational amplifiers. The design uses a raw comparator path and two adjustable m-out-of-n chains in a wired-OR configuration. Standard high speed memories allow the use of pulse widths below 100 ns. For eight pulse repetition intervals it gives a maximum improvement of 6.6 dB for stationary low-level target echoes. The doubled configuration enhances the capability against fluctuating targets. Because of the raw comparator path, also single return pulses of relatively high amplitude are processed.
Aalto University, PL 3340, TKK 02015, Espoo, Finland.
Pekka
P
Eskelinen
Jukka
J
Ruoskanen
Jouni
J
Peltonen