Flip-chip fabrication of nanoscale co-planar embedded electrodes with controlled exposed areas.
We discuss the fabrication of closely spaced nanoscale embedded co-planar electrodes with concealed contact wires, using a GaAs-based flip-chip technology. The co-planarity of the electrodes with the substrate and the low roughness of the exposed surface are achieved by templating the deposition of both the dielectric and electrode metal onto a smooth GaAs substrate. The resulting electrodes, with sizes of around 300 nm and separations as low as 25 nm, have RMS roughnesses of less than 0.2 nm and a co-planarity of around 1 nm.
School of Electronic and Electrical Engineering, University of Leeds, Leeds, UK.
Isa
I
Kiyat
A Giles
AG
Davies
Edmund H
EH
Linfield
Christoph
C
Wälti