title: Top-down fabrication of fully CMOS-compatible silicon nanowire arrays and their integration into CMOS Inverters on plastic.
abstract: A route to the top-down fabrication of highly ordered and aligned silicon nanowire (SiNW) arrays with degenerately doped source/drain regions from a bulk Si wafer is presented. In this approach, freestanding n- and p-SiNWs with an inverted triangular cross section are obtained using conventional photolithography, crystal orientation dependent wet etching, size reduction oxidation, and ion implantation doping. Based on these n- and p-SiNWs transferred onto a plastic substrate, simple SiNW-based complementary metal-oxide-semiconductor (CMOS) inverters are constructed for the possible applications of these SiNW arrays in integrated circuits on plastic. The static voltage transfer characteristic of the SiNW-based CMOS inverter exhibits a voltage gain of ∼9 V/V and a transition of 0.32 V at an operating voltage of 1.5 V with a full output voltage swing between 0 V and V(DD), and its mechnical bendability indicates good fatigue properties for potential applications of flexible electronics. This novel top-down approach is fully compatible with the current state-of-the-art Si-based CMOS technologies and, therefore, offers greater flexibility in device design for both high-performance and low-power functionality.
authors.affiliation: Department of Electrical Engineering, Korea University, Seoul 136-701, Republic of Korea.
authors.forename: Myeongwon
authors.initials: M
authors.lastname: Lee
authors.forename: Youngin
authors.initials: Y
authors.lastname: Jeon
authors.forename: Taeho
authors.initials: T
authors.lastname: Moon
authors.forename: Sangsig
authors.initials: S
authors.lastname: Kim