title: A stacked memory device on logic 3D technology for ultra-high-density data storage.
abstract: We have demonstrated, for the first time, a novel three-dimensional (3D) memory chip architecture of stacked-memory-devices-on-logic (SMOL) achieving up to 95% of cell-area efficiency by directly building up memory devices on top of front-end CMOS devices. In order to realize the SMOL, a unique 3D Flash memory device and vertical integration structure have been successfully developed. The SMOL architecture has great potential to achieve tera-bit level memory density by stacking memory devices vertically and maximizing cell-area efficiency. Furthermore, various emerging devices could replace the 3D memory device to develop new 3D chip architectures.
authors.affiliation: Device Research Laboratory, Department of Electrical Engineering, University of California, Los Angeles, CA 90095, USA.
authors.forename: Jiyoung
authors.initials: J
authors.lastname: Kim
authors.forename: Augustin J
authors.initials: AJ
authors.lastname: Hong
authors.forename: Sung Min
authors.initials: SM
authors.lastname: Kim
authors.forename: Kyeong-Sik
authors.initials: KS
authors.lastname: Shin
authors.forename: Emil B
authors.initials: EB
authors.lastname: Song
authors.forename: Yongha
authors.initials: Y
authors.lastname: Hwang
authors.forename: Faxian
authors.initials: F
authors.lastname: Xiu
authors.forename: Kosmas
authors.initials: K
authors.lastname: Galatsis
authors.forename: Chi On
authors.initials: CO
authors.lastname: Chui
authors.forename: Rob N
authors.initials: RN
authors.lastname: Candler
authors.forename: Siyoung
authors.initials: S
authors.lastname: Choi
authors.forename: Joo-Tae
authors.initials: JT
authors.lastname: Moon
authors.forename: Kang L
authors.initials: KL
authors.lastname: Wang