title: Parallel Parsing Algorithms and VLSI Implementations for Syntactic Pattern Recognition.
abstract: Earley's algorithm has been commonly used for the parsing of general context-free languages and the error-correcting parsing in syntactic pattern recognition. The time complexity for parsing is 0(n3). This paper presents a parallel Earley's recognition algorithm in terms of an ``X*'' operator. By restricting the input context-free grammar to be ¿-free, the parallel algorithm can be executed on a triangular-shape VLSI array. This array system has an efficient way of moving data to the right place at the right time. Simulation results show that this system can recognize a string with length n in 2n + 1 system time. We also present a parallel parse-extraction algorithm, a complete parsing algorithm, and an error-correcting recognition algorithm. The parallel complete parsing algorithm has been simulated on a processor array which is similar to the triangular VLSI array. For an input string of length n the processor array will give the correct right-parse at system time 2n + 1 if the string is accepted. The error-correcting recognition algorithm has also been simulated on a triangular VLSI array. This array recognizes an erroneous string of length n in time 2n + 1 and gives the correct error count. These parallel algorithms are especially useful for syntactic pattern recognition.
authors.affiliation: School of Electrical Engineering, Purdue University, West Lafayette, IN 47907; Department of Electrical and Computer Engineering, Washington State University, Pullman, WA 99163.
authors.forename: Y T
authors.initials: YT
authors.lastname: Chiang
authors.forename: K S
authors.initials: KS
authors.lastname: Fu