title: FPGA-based architecture for real-time data reduction of ultrasound signals.
abstract: This paper describes a novel method for on-line real-time data reduction of radiofrequency (RF) ultrasound signals. The approach is based on a field programmable gate array (FPGA) system intended mainly for steel thickness measurements. Ultrasound data reduction is desirable when: (1) direct measurements performed by an operator are not accessible; (2) it is required to store a considerable amount of data; (3) the application requires measuring at very high speeds; and (4) the physical space for the embedded hardware is limited. All the aforementioned scenarios can be present in applications such as pipeline inspection where data reduction is traditionally performed on-line using pipeline inspection gauges (PIG). The method proposed in this work consists of identifying and storing in real-time only the time of occurrence (TOO) and the maximum amplitude of each echo present in a given RF ultrasound signal. The method is tested with a dedicated immersion system where a significant data reduction with an average of 96.5% is achieved.
authors.affiliation: Investigacion Aplicada, Centro de Ingenieria y Desarrollo Industrial, Av. Playa Pie de la Cuesta 702, Desarrollo San Pablo, 76130 Queretaro, Qro., Mexico. jsoto@cidesi.mx
authors.forename: J A
authors.initials: JA
authors.lastname: Soto-Cajiga
authors.forename: J C
authors.initials: JC
authors.lastname: Pedraza-Ortega
authors.forename: C
authors.initials: C
authors.lastname: Rubio-Gonzalez
authors.forename: M
authors.initials: M
authors.lastname: Bandala-Sanchez
authors.forename: R de J
authors.initials: Rde J
authors.lastname: Romero-Troncoso
mesh_terms: D003199:Computer Systems; D003201:Computers; D009862:Online Systems; D014465:Ultrasonics / Q000379:methods*