title: Scalable processes for fabricating non-volatile memory devices using self-assembled 2D arrays of gold nanoparticles as charge storage nodes.
abstract: We propose robust and scalable processes for the fabrication of floating gate devices using ordered arrays of 7 nm size gold nanoparticles as charge storage nodes. The proposed strategy can be readily adapted for fabricating next generation (sub-20 nm node) non-volatile memory devices.
authors: Department of Chemical Engineering, Indian Institute of Science, Bangalore, 560012, India.
authors: Girish
authors: G
authors: Muralidharan
authors: Navakanta
authors: N
authors: Bhat
authors: Venugopal
authors: V
authors: Santhanam
mesh_terms: D016248:Computer Storage Devices; D003460:Crystallization / Q000379:methods*; D004867:Equipment Design; D019544:Equipment Failure Analysis; D006046:Gold / Q000737:chemistry*; D008422:Materials Testing; D049329:Nanostructures / Q000737:chemistry* / Q000648:ultrastructure*; D036103:Nanotechnology / Q000295:instrumentation*; D010316:Particle Size
chemical_list: D006046:Gold