Top-gate ZnO nanowire transistors and integrated circuits with ultrathin self-assembled monolayer gate dielectric.
A novel approach for the fabrication of transistors and circuits based on individual single-crystalline ZnO nanowires synthesized by a low-temperature hydrothermal method is reported. The gate dielectric of these transistors is a self-assembled monolayer that has a thickness of 2 nm and efficiently isolates the ZnO nanowire from the top-gate electrodes. Inverters fabricated on a single ZnO nanowire operate with frequencies up to 1 MHz. Compared with metal-semiconductor field-effect transistors, in which the isolation of the gate electrode from the carrier channel relies solely on the depletion layer in the semiconductor, the self-assembled monolayer dielectric leads to a reduction of the gate current by more than 3 orders of magnitude.
Max Planck Institute for Solid State Research, 70569 Stuttgart, Germany. D.Kaelblein@fkf.mpg.de
Daniel
D
Kälblein
R Thomas
RT
Weitz
H Jens
HJ
Böttcher
Frederik
F
Ante
Ute
U
Zschieschang
Klaus
K
Kern
Hagen
H
Klauk