title: A hardware-based computational platform for Generalized Laguerre-Volterra MIMO model for neural activities.
abstract: A parallelized and pipelined architecture based on FPGA and a higher-level Self Reconfiguration Platform are proposed in this paper to model Generalized Laguerre-Volterra MIMO system essential in identifying the time-varying neural dynamics underlying spike activities. Our proposed design is based on the Xilinx Virtex-6 FPGA platform and the processing core can produce data samples at a speed of 1.33 × 10(6)/s, which is 3.1 × 10(3) times faster than the corresponding C model running on an Intel i7-860 Quad Core Processor. The ongoing work of the construction of the advanced Self Reconfiguration Platform is presented and initial test results are provided.
authors.affiliation: Department of Electronic Engineering, City University of Hong Kong, Hong Kong SAR, China.
authors.forename: Will X Y
authors.initials: WX
authors.lastname: Li
authors.forename: Rosa H M
authors.initials: RH
authors.lastname: Chan
authors.forename: Wei
authors.initials: W
authors.lastname: Zhang
authors.forename: Ray C C
authors.initials: RC
authors.lastname: Cheung
authors.forename: Dong
authors.initials: D
authors.lastname: Song
authors.forename: Theodore W
authors.initials: TW
authors.lastname: Berger
mesh_terms: D000465:Algorithms; D000818:Animals; D032701:Biomimetics; D003201:Computers; D006624:Hippocampus / Q000502:physiology*; D006801:Humans; D008959:Models, Neurological; D015233:Models, Statistical; D008962:Models, Theoretical; D009474:Neurons / Q000378:metabolism; D011336:Probability; D011381:Programming Languages; D015203:Reproducibility of Results; D012815:Signal Processing, Computer-Assisted; D012984:Software; D009435:Synaptic Transmission