title: FPGA implementation of hardware processing modules as coprocessors in brain-machine interfaces.
abstract: Real-time computation, portability and flexibility are crucial for practical brain-machine interface (BMI) applications. In this work, we proposed Hardware Processing Modules (HPMs) as a method for accelerating BMI computation. Two HPMs have been developed. One is the field-programmable gate array (FPGA) implementation of spike sorting based on probabilistic neural network (PNN), and the other is the FPGA implementation of neural ensemble decoding based on Kalman filter (KF). These two modules were configured under the same framework and tested with real data from motor cortex recording in rats performing a lever-pressing task for water rewards. Due to the parallelism feature of FPGA, the computation time was reduced by several dozen times, while the results are almost the same as those from Matlab implementations. Such HPMs provide a high performance coprocessor for neural signal computation.
authors.affiliation: Qiushi Academy for Advanced Studies, and the Department of Biomedical Engineering and Instrument Science, Zhejiang University, Hangzhou, China.
authors.forename: Dong
authors.initials: D
authors.lastname: Wang
authors.forename: Yaoyao
authors.initials: Y
authors.lastname: Hao
authors.forename: Xiaoping
authors.initials: X
authors.lastname: Zhu
authors.forename: Ting
authors.initials: T
authors.lastname: Zhao
authors.forename: Yiwen
authors.initials: Y
authors.lastname: Wang
authors.forename: Yaowu
authors.initials: Y
authors.lastname: Chen
authors.forename: Weidong
authors.initials: W
authors.lastname: Chen
authors.forename: Xiaoxiang
authors.initials: X
authors.lastname: Zheng
mesh_terms: D000200:Action Potentials; D001921:Brain / Q000502:physiology*; D006801:Humans; D008328:Man-Machine Systems; D016571:Neural Networks, Computer; D011336:Probability