A voltage mode memristor bridge synaptic circuit with memristor emulators.
A memristor bridge neural circuit which is able to perform signed synaptic weighting was proposed in our previous study, where the synaptic operation was verified via software simulation of the mathematical model of the HP memristor. This study is an extension of the previous work advancing toward the circuit implementation where the architecture of the memristor bridge synapse is built with memristor emulator circuits. In addition, a simple neural network which performs both synaptic weighting and summation is built by combining memristor emulators-based synapses and differential amplifier circuits. The feasibility of the memristor bridge neural circuit is verified via SPICE simulations.
Division of Electronics and Information Engineering, Chonbuk National University, Jeonju 561-756, Korea. maheshwarsah@hotmail.com
Maheshwar Pd
MP
Sah
Changju
C
Yang
Hyongsuk
H
Kim
Leon
L
Chua