title: High-performance III-V MOSFET with nano-stacked high-k gate dielectric and 3D fin-shaped structure.
abstract: A three-dimensional (3D) fin-shaped field-effect transistor structure based on III-V metal-oxide-semiconductor field-effect transistor (MOSFET) fabrication has been demonstrated using a submicron GaAs fin as the high-mobility channel. The fin-shaped channel has a thickness-to-width ratio (TFin/WFin) equal to 1. The nano-stacked high-k Al2O3 dielectric was adopted as a gate insulator in forming a metal-oxide-semiconductor structure to suppress gate leakage. The 3D III-V MOSFET exhibits outstanding gate controllability and shows a high Ion/Ioff ratio > 105 and a low subthreshold swing of 80 mV/decade. Compared to a conventional Schottky gate metal-semiconductor field-effect transistor or planar III-V MOSFETs, the III-V MOSFET in this work exhibits a significant performance improvement and is promising for future development of high-performance n-channel devices based on III-V materials.
authors.affiliation: Department of Electronic Engineering, Minghsin University of Science and Technology, Hsinchu 30401, Taiwan. wsliaoumc@yahoo.com.tw.
authors.forename: Szu-Hung
authors.initials: SH
authors.lastname: Chen
authors.forename: Wen-Shiang
authors.initials: WS
authors.lastname: Liao
authors.forename: Hsin-Chia
authors.initials: HC
authors.lastname: Yang
authors.forename: Shea-Jue
authors.initials: SJ
authors.lastname: Wang
authors.forename: Yue-Gie
authors.initials: YG
authors.lastname: Liaw
authors.forename: Hao
authors.initials: H
authors.lastname: Wang
authors.forename: Haoshuang
authors.initials: H
authors.lastname: Gu
authors.forename: Mu-Chun
authors.initials: MC
authors.lastname: Wang