Hierarchical three-dimensional layer-by-layer assembly of carbon nanotube wafers for integrated nanoelectronic devices.
We report a general approach to overcome the enormous obstacle of the integration of CNTs into devices by bonding single-walled carbon nanotubes (SWNTs) films to arbitrary substrates and transferring them into densified and lithographically processable "CNT wafers". Our approach allows hierarchical layer-by-layer assembly of SWNTs into organized three-dimensional structures, for example, bidirectional islands, crossbar arrays with and without contacts on Si, and flexible substrates. These organized SWNT structures can be integrated with low-power resistive random-access memory.
Nanotube Research Center, National Institute of Advanced Industrial Science and Technology (AIST), Tsukuba 305-8565, Japan.
Takeo
T
Yamada
Natsumi
N
Makiomoto
Atsuko
A
Sekiguchi
Yuki
Y
Yamamoto
Kazufumi
K
Kobashi
Yuhei
Y
Hayamizu
Yoshiki
Y
Yomogida
Hiroyuki
H
Tanaka
Hisashi
H
Shima
Hiroyuki
H
Akinaga
Don N
DN
Futaba
Kenji
K
Hata
D003460:Crystallization / Q000379:methods*; D004581:Electronics / Q000295:instrumentation*; D004867:Equipment Design; D019544:Equipment Failure Analysis; D008422:Materials Testing; D036103:Nanotechnology / Q000295:instrumentation*; D037742:Nanotubes, Carbon / Q000737:chemistry* / Q000648:ultrastructure*; D010316:Particle Size; D018511:Systems Integration
D037742:Nanotubes, Carbon