title: Ultra-low timing-jitter 40GHz clock recovery using EAM-MZM double-loop and its application in a 640Gbit/s OTDM system.
abstract: An ultra-low timing-jitter clock recovery scheme based on EAM-MZM double-loop with the ability of simultaneous time-division demultiplexing is proposed and demonstrated in a 640 Gbit/s OTDM transmission system. Compared with traditional clock recovery scheme based on OEO loop, significant timing-jitter improvement of the 40 GHz recovered clock is realized: from 58 fs to 30 fs in back-to-back configuration and from 59 fs to 35 fs after 400 km transmission in the 100 Hz to 10 MHz range, without increasing the overall system complexity and cost. Enabled by the proposed clock recovery and demultiplexing scheme, error-free performance of the OTDM system is achieved after 400 km transmission with an average power penalty of 4dB.
authors.affiliation: State Key Laboratory of Information Photonics and Optical Communications, Beijing University of Posts and Telecommunications, Beijing 100876, China. demingkong@bupt.edu.cn
authors.forename: Deming
authors.initials: D
authors.lastname: Kong
authors.forename: Hui
authors.initials: H
authors.lastname: Wang
authors.forename: Yan
authors.initials: Y
authors.lastname: Li
authors.forename: Jizhao
authors.initials: J
authors.lastname: Zang
authors.forename: Siyuan
authors.initials: S
authors.lastname: Zhou
authors.forename: Xixue
authors.initials: X
authors.lastname: Jia
authors.forename: Jian
authors.initials: J
authors.lastname: Wu
authors.forename: Jintong
authors.initials: J
authors.lastname: Lin