title: High-performance top-gated monolayer SnS2 field-effect transistors and their integrated logic circuits.
abstract: Two-dimensional (2D) layered semiconductors are very promising for post-silicon ultrathin channels and flexible electronics due to the remarkable dimensional and mechanical properties. Besides molybdenum disulfide (MoS2), the first recognized 2D semiconductor, it is also important to explore the wide spectrum of layered metal chalcogenides (LMCs) and to identify possible compounds with high performance. Here we report the fabrication of high-performance top-gated field-effect transistors (FETs) and related logic gates from monolayer tin disulfide (SnS2), a non-transition metal dichalcogenide. The measured carrier mobility of our monolayer devices reaches 50 cm(2) V(-1) s(-1), much higher than that of the back-gated counterparts (~1 cm(2) V(-1) s(-1)). Based on a direct-coupled FET logic technique, advanced Boolean logic gates and operations are also implemented, with a voltage gain of 3.5 and output swing of >90% for the NOT and NOR gates, respectively. The superior electrical and integration properties make monolayer SnS2 a strong candidate for next-generation atomic electronics.
authors.affiliation: Wuhan National Laboratory for Optoelectronics (WNLO) and School of Optical and Electronic Information, Huazhong University of Science and Technology (HUST), Wuhan 430074, P. R. China. jtang@mail.hust.edu.cn li.songlin@nims.go.jp Tsukagoshi.Kazuhito@ nims.go.jp.
authors.forename: H S
authors.initials: HS
authors.lastname: Song
authors.forename: S L
authors.initials: SL
authors.lastname: Li
authors.forename: L
authors.initials: L
authors.lastname: Gao
authors.forename: Y
authors.initials: Y
authors.lastname: Xu
authors.forename: K
authors.initials: K
authors.lastname: Ueno
authors.forename: J
authors.initials: J
authors.lastname: Tang
authors.forename: Y B
authors.initials: YB
authors.lastname: Cheng
authors.forename: K
authors.initials: K
authors.lastname: Tsukagoshi