title: 3D spatial resolution improvement by dual-axis electron tomography: application to tri-gate transistors.
abstract: The performance of semiconductor devices can be linked to geometry and variations of the structure. For transistors in particular, the geometry of the gate stack is essential. In this work we investigate the gate stack of a tri-gate transistor using dual-axis electron tomography. This allows the reconstruction of all surfaces of the gate of the transistor with high resolution and measurement of the local thickness of the gate oxide. While previously, dual-axis electron tomography was employed for reducing missing wedge artifacts, our work demonstrates the potential of dual-axis tomography for improving the resolution of a tomographic reconstruction, even for structures not affected by missing wedge artifacts. By simulations and experiments we show the value of dual-axis tomography for characterization of nanoscale devices as an approach that requires no prior information and that can be easily extended even to more than two tilt axes.
authors.affiliation: CEA, LETI, MINATEC Campus, 17 rue des Martyrs, 38054 Grenoble Cedex 9, France. Electronic address: ghaberfehlner@yahoo.de.
authors.forename: Georg
authors.initials: G
authors.lastname: Haberfehlner
authors.forename: Raphaël
authors.initials: R
authors.lastname: Serra
authors.forename: David
authors.initials: D
authors.lastname: Cooper
authors.forename: Sylvain
authors.initials: S
authors.lastname: Barraud
authors.forename: Pierre
authors.initials: P
authors.lastname: Bleuet
keywords: Double-tilt; Dual-axis; Electron tomography; Gate thickness; SIRT; Tri-gate