title: Experimental study of plane electrode thickness scaling for 3D vertical resistive random access memory.
abstract: The vertical scaling for the multi-layer stacked 3D vertical resistive random access memory (RRAM) cross-point array is investigated. The thickness of the multi-layer stack for a 3D RRAM is a key factor for determining the storage density. A vertical RRAM cell with plane electrode thickness (tm) scaled down to 5 nm, aiming to minimize 3D stack height, is experimentally demonstrated. An improvement factor of 5 in device density can be achieved as compared to a previous demonstration using a 22 nm thick plane electrode. It is projected that 37 layers can be stacked for a lithographic half-pitch (F) = 26 nm and total thickness of one stack (T) = 21 nm, delivering a bit density of 72.8 nm(2)/cell.
authors.affiliation: Center for Integrated Systems and Department of Electrical Engineering, Stanford University, Stanford, CA 94305, USA.
authors.forename: Hong-Yu
authors.initials: HY
authors.lastname: Chen
authors.forename: Shimeng
authors.initials: S
authors.lastname: Yu
authors.forename: Bin
authors.initials: B
authors.lastname: Gao
authors.forename: Rui
authors.initials: R
authors.lastname: Liu
authors.forename: Zizhen
authors.initials: Z
authors.lastname: Jiang
authors.forename: Yexin
authors.initials: Y
authors.lastname: Deng
authors.forename: Bing
authors.initials: B
authors.lastname: Chen
authors.forename: Jinfeng
authors.initials: J
authors.lastname: Kang
authors.forename: H-S Philip
authors.initials: HS
authors.lastname: Wong