title: Device/Circuit co-design guide for passive memristor array with non-linear current-voltage behavior.
abstract: In this paper, the non-linearity in memristor's current-voltage relationship that can affect half-selected cells is analyzed. From the simulation, for the V(DD)/2 scheme, if the non-linear coefficient is larger than 8, unwanted resistance loss during the write time can be suppressed less than 10%. Comparing the V(DD)/2 and V(DD)/3 scheme, the V(DD)/2 scheme can reduce the current consumption by 2 orders of magnitude with little larger resistance change in half-selected cells than the V(DD)/3.
authors.affiliation: School of Electrical Engineering, Kookmin University, Seoul 136-702, Korea.
authors.forename: Seok-Jin
authors.initials: SJ
authors.lastname: Ham
authors.forename: Jeong-Heon
authors.initials: JH
authors.lastname: Kim
authors.forename: Kyeong-Sik
authors.initials: KS
authors.lastname: Min