title: Graphene and thin-film semiconductor heterojunction transistors integrated on wafer scale for low-power electronics.
abstract: Graphene heterostructures in which graphene is combined with semiconductors or other layered 2D materials are of considerable interest, as a new class of electronic devices has been realized. Here we propose a technology platform based on graphene-thin-film-semiconductor-metal (GSM) junctions, which can be applied to large-scale and power-efficient electronics compatible with a variety of substrates. We demonstrate wafer-scale integration of vertical field-effect transistors (VFETs) based on graphene-In-Ga-Zn-O (IGZO)-metal asymmetric junctions on a transparent 150 × 150 mm(2) glass. In this system, a triangular energy barrier between the graphene and metal is designed by selecting a metal with a proper work function. We obtain a maximum current on/off ratio (Ion/Ioff) up to 10(6) with an average of 3010 over 2000 devices under ambient conditions. For low-power logic applications, an inverter that combines complementary n-type (IGZO) and p-type (Ge) devices is demonstrated to operate at a bias of only 0.5 V.
authors.affiliation: Samsung Advanced Institute of Technology, Samsung Electronics Co. , 97 Samsung2-ro, Giheung-gu, Yongin-si, Gyeonggi-do 446-712, Korea.
authors.forename: Jinseong
authors.initials: J
authors.lastname: Heo
authors.forename: Kyung-Eun
authors.initials: KE
authors.lastname: Byun
authors.forename: Jaeho
authors.initials: J
authors.lastname: Lee
authors.forename: Hyun-Jong
authors.initials: HJ
authors.lastname: Chung
authors.forename: Sanghun
authors.initials: S
authors.lastname: Jeon
authors.forename: Seongjun
authors.initials: S
authors.lastname: Park
authors.forename: Sungwoo
authors.initials: S
authors.lastname: Hwang
mesh_terms: D004581:Electronics; D006108:Graphite / Q000737:chemistry*; D012666:Semiconductors; D014173:Transistors, Electronic
chemical_list: D006108:Graphite