title: Suppression of degradation induced by negative gate bias and illumination stress in amorphous InGaZnO thin-film transistors by applying negative drain bias.
abstract: The effect of drain bias (V(DS)) on the negative gate bias and illumination stress (NBIS) stability of amorphous InGaZnO (a-IGZO) thin-film transistors was investigated using a double-sweeping gate voltage (V(GS)) mode. The variation in the transfer characteristics was explored using current-voltage and capacitance-voltage characteristics. In the initial stage (<1000 s) of NBIS with grounded V(DS) (V(GS) = -40 V and V(DS) = 0 V), the transfer characteristics shifted negatively with an insignificant change in the subthreshold swing (SS) because of hole trapping at an IGZO/gate insulator interface. On the other hand, on-current degradation was observed and was accelerated in the forward measurement as the NBIS duration increased. The results indicated that NBIS induced donor-like defects near the conduction band; however, the transfer curves in the reverse measurement shifted positively without on-current and SS degradations. It was found that the degradations were enhanced by applying a positive V(DS) bias (V(GS) = -40 V and V(DS) = 40 V); in contrast, they could be reduced by applying a small negative V(DS) of V(DS) > V(GS) (V(GS) = -40 V and V(DS) = -20 V). Furthermore, it was confirmed that the NBIS degradations could be suppressed by applying a large negative V(DS) bias of V(DS) < V(GS) (V(GS) = -40 V and V(DS) = -60 V) during NBIS.
authors.affiliation: Department of Environmental Science and Engineering, Kochi University of Technology , Kami, Kochi 782-8502, Japan.
authors.forename: Dapeng
authors.initials: D
authors.lastname: Wang
authors.forename: Mai Phi
authors.initials: MP
authors.lastname: Hung
authors.forename: Jingxin
authors.initials: J
authors.lastname: Jiang
authors.forename: Tatsuya
authors.initials: T
authors.lastname: Toda
authors.forename: Mamoru
authors.initials: M
authors.lastname: Furuta