Improving the electrical properties of lanthanum silicate films on ge metal oxide semiconductor capacitors by adopting interfacial barrier and capping layers.
The electrical properties of La-silicate films grown by atomic layer deposition (ALD) on Ge substrates with different film configurations, such as various Si concentrations, Al2O3 interfacial passivation layers, and SiO2 capping layers, were examined. La-silicate thin films were deposited using alternating injections of the La[N{Si(CH3)3}2]3 precursor with O3 as the La and O precursors, respectively, at a substrate temperature of 310 °C. The Si concentration in the La-silicate films was further controlled by adding ALD cycles of SiO2. For comparison, La2O3 films were also grown using [La((i)PrCp)3] and O3 as the La precursor and oxygen source, respectively, at the identical substrate temperature. The capacitance-voltage (C-V) hysteresis decreased with an increasing Si concentration in the La-silicate films, although the films showed a slight increase in the capacitance equivalent oxide thickness. The adoption of Al2O3 at the interface as a passivation layer resulted in lower C-V hysteresis and a low leakage current density. The C-V hysteresis voltages of the La-silicate films with Al2O3 passivation and SiO2 capping layers was significantly decreased to ∼0.1 V, whereas the single layer La-silicate film showed a hysteresis voltage as large as ∼1.0 V.
Department of Materials Science and Engineering & Inter-university Semiconductor Research Center, Seoul National University , Seoul 151-744, South Korea.
Yu Jin
YJ
Choi
Hajin
H
Lim
Suhyeong
S
Lee
Sungin
S
Suh
Joon Rae
JR
Kim
Hyung-Suk
HS
Jung
Sanghyun
S
Park
Jong Ho
JH
Lee
Seong Gyeong
SG
Kim
Cheol Seong
CS
Hwang
HyeongJoon
H
Kim