title: 2.4 GHz CMOS power amplifier with mode-locking structure to enhance gain.
abstract: We propose a mode-locking method optimized for the cascode structure of an RF CMOS power amplifier. To maximize the advantage of the typical mode-locking method in the cascode structure, the input of the cross-coupled transistor is modified from that of a typical mode-locking structure. To prove the feasibility of the proposed structure, we designed a 2.4 GHz CMOS power amplifier with a 0.18 μm RFCMOS process for polar transmitter applications. The measured power added efficiency is 34.9%, while the saturated output power is 23.32 dBm. The designed chip size is 1.4 × 0.6 mm(2).
authors.affiliation: School of Electronic Engineering, College of Information Technology, Soongsil University, 551 Sangdo-Dong, Dongjak-Gu, Seoul 156-743, Republic of Korea.
authors.forename: Changhyun
authors.identifier: 0000-0002-6931-7925
authors.initials: C
authors.lastname: Lee
authors.affiliation: School of Electronic Engineering, College of Information Technology, Soongsil University, 551 Sangdo-Dong, Dongjak-Gu, Seoul 156-743, Republic of Korea.
authors.forename: Changkun
authors.identifier: 0000-0002-4699-9935
authors.initials: C
authors.lastname: Park