title: A dual slope charge sampling analog front-end for a wireless neural recording system.
abstract: This paper presents a novel dual slope charge sampling (DSCS) analog front-end (AFE) architecture, which amplifies neural signals by taking advantage of the charge sampling concept for analog signal conditioning, such as amplification and filtering. The presented DSCS-AFE achieves amplification, filtering, and sampling in a simultaneous fashion, while consuming very small amount of power. The output of the DSCS-AFE produces a pulse width modulated (PWM) signal that is proportional to the input voltage amplitude. A circular shift register (CSR) utilizes time division multiplexing (TDM) of the PWM pulses to create a pseudo-digital TDM-PWM signal that can feed a wireless transmitter. The 8-channel system-on-a-chip was fabricated in a 0.35-μm CMOS process, occupying 2.4 × 2.1 mm(2) and consuming 255 μW from a 1.8V supply. Measured input-referred noise for the entire system, including the FPGA in order to recover PWM signal is 6.50 μV(rms) in the 288 Hz~10 kHz range. For each channel, sampling rate is 31.25 kHz, and power consumption is 31.8 μW.
authors.forename: Seung Bae
authors.initials: SB
authors.lastname: Lee
authors.forename: Byunghun
authors.initials: B
authors.lastname: Lee
authors.forename: Benoit
authors.initials: B
authors.lastname: Gosselin
authors.forename: Maysam
authors.initials: M
authors.lastname: Ghovanloo
mesh_terms: D000669:Amplifiers, Electronic; D004560:Electricity; D004567:Electrodes, Implanted; D009474:Neurons / Q000502:physiology*; D009482:Neurophysiology / Q000295:instrumentation*; D059015:Wireless Technology / Q000295:instrumentation*