title: Symbolic representation for analog realization of a family of fractional order controller structures via continued fraction expansion.
abstract: This paper uses the Continued Fraction Expansion (CFE) method for analog realization of fractional order differ-integrator and few special classes of fractional order (FO) controllers viz. Fractional Order Proportional-Integral-Derivative (FOPID) controller, FO[PD] controller and FO lead-lag compensator. Contemporary researchers have given several formulations for rational approximation of fractional order elements. However, approximation of the controllers studied in this paper, due to having fractional power of a rational transfer function, is not available in analog domain; although its digital realization already exists. This motivates us for applying CFE based analog realization technique for complicated FO controller structures to get equivalent rational transfer functions in terms of the controller tuning parameters. The symbolic expressions for rationalized transfer function in terms of the controller tuning parameters are especially important as ready references, without the need of running CFE algorithm every time and also helps in the synthesis of analog circuits for such FO controllers.
authors: Department of Instrumentation and Electronics Engineering, Jadavpur University, Salt Lake Campus, LB-8, Sector 3, Kolkata 700098, India; Faculty of Electrical Engineering, Mathematics and Computer Science, University of Twente, Drienerlolaan 5, 7522 NB Enschede, The Netherlands. Electronic address: a.pakhira@student.utwente.nl.
authors: Anindya
authors: A
authors: Pakhira
authors: School of Electronics and Computer Science, University of Southampton, Southampton SO17 1BJ, United Kingdom; Department of Power Engineering, Jadavpur University, Salt Lake Campus, LB-8, Sector 3, Kolkata-700098, India. Electronic address: s.das@soton.ac.uk.
authors: Saptarshi
authors: S
authors: Das
authors: Department of Earth Science and Engineering, Imperial College London, Exhibition Road, London SW7 2AZ, United Kingdom. Electronic address: i.pan11@imperial.ac.uk.
authors: Indranil
authors: I
authors: Pan
authors: Reactor Control Division, Bhabha Atomic Research Centre, Mumbai 400085, India. Electronic address: shantanu@barc.gov.in.
authors: Shantanu
authors: S
authors: Das
keywords: Analog realization; Continued fraction expansion (CFE); Domino-ladder; FO lead–lag compensator; FO[PD] controller; Fractional order controller; Symbolic realization