title: Switched-capacitor realization of presynaptic short-term-plasticity and stop-learning synapses in 28 nm CMOS.
abstract: Synaptic dynamics, such as long- and short-term plasticity, play an important role in the complexity and biological realism achievable when running neural networks on a neuromorphic IC. For example, they endow the IC with an ability to adapt and learn from its environment. In order to achieve the millisecond to second time constants required for these synaptic dynamics, analog subthreshold circuits are usually employed. However, due to process variation and leakage problems, it is almost impossible to port these types of circuits to modern sub-100nm technologies. In contrast, we present a neuromorphic system in a 28 nm CMOS process that employs switched capacitor (SC) circuits to implement 128 short term plasticity presynapses as well as 8192 stop-learning synapses. The neuromorphic system consumes an area of 0.36 mm(2) and runs at a power consumption of 1.9 mW. The circuit makes use of a technique for minimizing leakage effects allowing for real-time operation with time constants up to several seconds. Since we rely on SC techniques for all calculations, the system is composed of only generic mixed-signal building blocks. These generic building blocks make the system easy to port between technologies and the large digital circuit part inherent in an SC system benefits fully from technology scaling.
authors.affiliation: Chair of Highly-Parallel VLSI-Systems and Neuromorphic Circuits, Technische Universität Dresden Dresden, Germany.
authors.forename: Marko
authors.initials: M
authors.lastname: Noack
authors.affiliation: Chair of Highly-Parallel VLSI-Systems and Neuromorphic Circuits, Technische Universität Dresden Dresden, Germany.
authors.forename: Johannes
authors.initials: J
authors.lastname: Partzsch
authors.affiliation: Institute of Neuroinformatics, University of Zurich and ETH Zurich Zurich, Switzerland.
authors.forename: Christian G
authors.initials: CG
authors.lastname: Mayr
authors.affiliation: Chair of Highly-Parallel VLSI-Systems and Neuromorphic Circuits, Technische Universität Dresden Dresden, Germany.
authors.forename: Stefan
authors.initials: S
authors.lastname: Hänzsche
authors.affiliation: Chair of Highly-Parallel VLSI-Systems and Neuromorphic Circuits, Technische Universität Dresden Dresden, Germany.
authors.forename: Stefan
authors.initials: S
authors.lastname: Scholze
authors.affiliation: Chair of Highly-Parallel VLSI-Systems and Neuromorphic Circuits, Technische Universität Dresden Dresden, Germany.
authors.forename: Sebastian
authors.initials: S
authors.lastname: Höppner
authors.affiliation: Chair of Highly-Parallel VLSI-Systems and Neuromorphic Circuits, Technische Universität Dresden Dresden, Germany.
authors.forename: Georg
authors.initials: G
authors.lastname: Ellguth
authors.affiliation: Chair of Highly-Parallel VLSI-Systems and Neuromorphic Circuits, Technische Universität Dresden Dresden, Germany.
authors.forename: Rene
authors.initials: R
authors.lastname: Schüffny
keywords: deep-submicron neuromorphic; dynamic synapse; low-leakage switched-capacitor circuits; stop-learning synapse; switched-capacitor neuromorphic