title: Precise localized thinning and vertical taper fabrication for silicon photonics using a modified local oxidation of silicon (LOCOS) fabrication process.
abstract: This paper presents a method to locally fine tune silicon-on-insulator (SOI) device layer thickness for the fabrication of optimal silicon photonics devices. Very precise control of thickness can be achieved with a modified local oxidation of silicon (LOCOS) process. The fabrication process is robust, complementary metal-oxide-semiconductor (CMOS) compatible and has the advantage of creating vertical tapers (~5.3 µm long for ~210 nm of height) required for impedance matching between sections of different height. The technology is demonstrated by fabricating a TE-pass filter.
authors.forename: Guillaume
authors.initials: G
authors.lastname: Beaudin
authors.forename: Ali
authors.initials: A
authors.lastname: Belarouci
authors.forename: Vincent
authors.initials: V
authors.lastname: Aimez