title: Vertical and Lateral Copper Transport through Graphene Layers.
abstract: A different mechanism was found for Cu transport through multi-transferred single-layer graphene serving as diffusion barriers on the basis of time-dependent dielectric breakdown tests. Vertical and lateral transport of Cu dominates at different stress electric field regimes. The classic E-model was modified to project quantitatively the effectiveness of the graphene Cu diffusion barrier at low electric field based on high-field accelerated stress data. The results are compared to industry-standard Cu diffusion barrier material TaN. 3.5 Å single-layer graphene shows the mean time-to-fail comparable to 4 nm TaN, while two-time and three-time transferred single-layer graphene stacks give 2× and 3× improvements, respectively, compared to single-layer graphene at a 0.5 MV/cm electric field. The influences of graphene grain boundaries on Cu vertical transport through the graphene layers are explored, revealing that large-grain (10-15 μm) single-layer graphene gives a 2 orders of magnitude longer lifetime than small-grain (2-3 μm) graphene. As a result, it is more effective to further enhance graphene barrier reliability by improving single-layer graphene quality through increasing grain sizes or using single-crystalline graphene than just by increasing thickness through multi-transfer. These results may also be applied for graphene as barriers for other metals.
authors.forename: Ling
authors.initials: L
authors.lastname: Li
authors.affiliation: Department of Electrical Engineering, Stanford University , Stanford, California 94305, United States.
authors.forename: Xiangyu
authors.initials: X
authors.lastname: Chen
authors.affiliation: Department of Electrical Engineering, Stanford University , Stanford, California 94305, United States.
authors.forename: Ching-Hua
authors.initials: CH
authors.lastname: Wang
authors.affiliation: Department of Electrical Engineering, Stanford University , Stanford, California 94305, United States.
authors.forename: Ji
authors.initials: J
authors.lastname: Cao
authors.affiliation: Department of Electrical Engineering, Stanford University , Stanford, California 94305, United States.
authors.forename: Seunghyun
authors.initials: S
authors.lastname: Lee
authors.affiliation: Department of Electrical Engineering, Stanford University , Stanford, California 94305, United States.
authors.forename: Alvin
authors.initials: A
authors.lastname: Tang
authors.affiliation: Department of Electrical Engineering, Stanford University , Stanford, California 94305, United States.
authors.forename: Chiyui
authors.initials: C
authors.lastname: Ahn
authors.affiliation: Department of Materials Science and Engineering, University of Wisconsin-Madison , Madison, Wisconsin 53706, United States.
authors.forename: Susmit
authors.initials: S
authors.lastname: Singha Roy
authors.affiliation: Department of Materials Science and Engineering, University of Wisconsin-Madison , Madison, Wisconsin 53706, United States.
authors.forename: Michael S
authors.initials: MS
authors.lastname: Arnold
authors.affiliation: Department of Electrical Engineering, Stanford University , Stanford, California 94305, United States.
authors.forename: H-S Philip
authors.initials: HS
authors.lastname: Wong
keywords: Cu diffusion barrier; back-end-of-the-line (BEOL); graphene; interconnect; modified E-model; reliability; time-dependent dielectric breakdown (TDDB)