title: An Autonomous Satellite Time Synchronization System Using Remotely Disciplined VC-OCXOs.
abstract: An autonomous remote clock control system is proposed to provide time synchronization and frequency syntonization for satellite to satellite or ground to satellite time transfer, with the system comprising on-board voltage controlled oven controlled crystal oscillators (VC-OCXOs) that are disciplined to a remote master atomic clock or oscillator. The synchronization loop aims to provide autonomous operation over extended periods, be widely applicable to a variety of scenarios and robust. A new architecture comprising the use of frequency division duplex (FDD), synchronous time division (STDD) duplex and code division multiple access (CDMA) with a centralized topology is employed. This new design utilizes dual one-way ranging methods to precisely measure the clock error, adopts least square (LS) methods to predict the clock error and employs a third-order phase lock loop (PLL) to generate the voltage control signal. A general functional model for this system is proposed and the error sources and delays that affect the time synchronization are discussed. Related algorithms for estimating and correcting these errors are also proposed. The performance of the proposed system is simulated and guidance for selecting the clock is provided.
authors.affiliation: School of Electronic and Information Engineering, Beihang University, Xueyuan Road No. 37, Haidian District, Beijing 100191, China. xiaobo.gu@buaa.edu.cn.
authors.forename: Xiaobo
authors.initials: X
authors.lastname: Gu
authors.affiliation: School of Electronic and Information Engineering, Beihang University, Xueyuan Road No. 37, Haidian District, Beijing 100191, China. changq@263.net.
authors.forename: Qing
authors.initials: Q
authors.lastname: Chang
authors.affiliation: Australian Centre for Space Engineering Research (ACSER), School of Electrical Engineering and Telecommunications, University of New South Wales, High Street, Sydney, NSW 2052, Australia. e.glennon@unsw.edu.au.
authors.forename: Eamonn P
authors.initials: EP
authors.lastname: Glennon
authors.affiliation: School of Electronic and Information Engineering, Beihang University, Xueyuan Road No. 37, Haidian District, Beijing 100191, China. xubaoda@foxmail.com.
authors.forename: Baoda
authors.initials: B
authors.lastname: Xu
authors.affiliation: Australian Centre for Space Engineering Research (ACSER), School of Electrical Engineering and Telecommunications, University of New South Wales, High Street, Sydney, NSW 2052, Australia. a.dempster@unsw.edu.au.
authors.forename: Andrew G
authors.initials: AG
authors.lastname: Dempseter
authors.affiliation: Space Star Technology Co., Ltd., Zhichun Road No. 82, Haidian District, Beijing 100191, China. dawun04@163.com.
authors.forename: Dun
authors.initials: D
authors.lastname: Wang
authors.affiliation: Space Star Technology Co., Ltd., Zhichun Road No. 82, Haidian District, Beijing 100191, China. wjp82-12-13@163.com.
authors.forename: Jiapeng
authors.initials: J
authors.lastname: Wu
keywords: clock adjustment; dual one-way ranging; inter-satellite link; time synchronization