title: Speed optimized linear-mode high-voltage CMOS avalanche photodiodes with high responsivity.
abstract: Two different speed optimized avalanche photodiodes (APDs) fabricated in a 0.35 μm standard high-voltage (HV) complementary metal-oxide-semiconductor (CMOS) process with a high unamplified responsivity (avalanche gain M=1) of 0.41 A/W at 670 nm are presented. These APDs differ regarding the effective doping of the deep p well (90% and 75%), using lateral well modulation doping. Compared to the -3  dB bandwidth of the unmodulated APD with 100% doping (850 MHz), this optimization leads to an improved bandwidth of 1.02 and 1.25 GHz for the 75% APD and 90% APD, respectively, both at a gain of M=50.
authors.forename: R
authors.initials: R
authors.lastname: Enne
authors.forename: B
authors.initials: B
authors.lastname: Steindl
authors.forename: H
authors.initials: H
authors.lastname: Zimmermann