title: Co-Design Method and Wafer-Level Packaging Technique of Thin-Film Flexible Antenna and Silicon CMOS Rectifier Chips for Wireless-Powered Neural Interface Systems.
abstract: In this paper, a co-design method and a wafer-level packaging technique of a flexible antenna and a CMOS rectifier chip for use in a small-sized implantable system on the brain surface are proposed. The proposed co-design method optimizes the system architecture, and can help avoid the use of external matching components, resulting in the realization of a small-size system. In addition, the technique employed to assemble a silicon large-scale integration (LSI) chip on the very thin parylene film (5 μm) enables the integration of the rectifier circuits and the flexible antenna (rectenna). In the demonstration of wireless power transmission (WPT), the fabricated flexible rectenna achieved a maximum efficiency of 0.497% with a distance of 3 cm between antennas. In addition, WPT with radio waves allows a misalignment of 185% against antenna size, implying that the misalignment has a less effect on the WPT characteristics compared with electromagnetic induction.
authors.affiliation: Department of Electrical and Electronic Information Engineering, Toyohashi University of Technology, Aichi 441-8580, Japan. okabe-k@int.ee.tut.ac.jp.
authors.forename: Kenji
authors.initials: K
authors.lastname: Okabe
authors.affiliation: Department of Electrical and Electronic Information Engineering, Toyohashi University of Technology, Aichi 441-8580, Japan. jeewan@int.ee.tut.ac.jp.
authors.forename: Horagodage Prabhath
authors.initials: HP
authors.lastname: Jeewan
authors.affiliation: Department of Electrical and Electronic Information Engineering, Toyohashi University of Technology, Aichi 441-8580, Japan. yamagiwa-s@int.ee.tut.ac.jp.
authors.forename: Shota
authors.initials: S
authors.lastname: Yamagiwa
authors.affiliation: Department of Electrical and Electronic Information Engineering, Toyohashi University of Technology, Aichi 441-8580, Japan. kawano@ee.tut.ac.jp.
authors.forename: Takeshi
authors.initials: T
authors.lastname: Kawano
authors.affiliation: Department of Electrical and Electronic Information Engineering, Toyohashi University of Technology, Aichi 441-8580, Japan. ishida@ee.tut.ac.jp.|Electronics-Inspired Interdisciplinary Research Institute (EIIRIS), Toyohashi University of Technology, Aichi 441-8580, Japan. ishida@ee.tut.ac.jp.
authors.forename: Makoto
authors.initials: M
authors.lastname: Ishida
authors.affiliation: Department of Electrical and Electronic Information Engineering, Toyohashi University of Technology, Aichi 441-8580, Japan. ippei.akita@ieee.org.
authors.forename: Ippei
authors.initials: I
authors.lastname: Akita
mesh_terms: D001921:Brain / Q000502:physiology; D006801:Humans; D058117:Neural Prostheses; D011474:Prosthesis Design; D012666:Semiconductors; D012825:Silicon / Q000737:chemistry*; D013499:Surface Properties; D013686:Telemetry / Q000295:instrumentation*
chemical_list: D012825:Silicon
keywords: flexible substrate; flip-chip bonding; rectenna; wafer-level packaging; wireless power transmission