title: Abnormal Threshold Voltage Shifts in P-Channel Low-Temperature Polycrystalline Silicon Thin Film Transistors Under Negative Bias Temperature Stress.
abstract: In this research, we have investigated the instability of P-channel low-temperature polycrystalline silicon (poly-Si) thin-film transistors (LTPS TFTs) with double-layer SiO2/SiNx dielectrics. A negative gate bias temperature instability (NBTI) stress was applied and a turn-around behavior phenomenon was observed in the Threshold Voltage Shift (Vth). A positive threshold voltage shift occurs in the first stage, resulting from the negative charge trapping at the SiNx/SiO2 dielectric interface being dominant over the positive charge trapping at dielectric/Poly-Si interface. Following a stress time of 7000 s, the Vth switches to the negative voltage direction, which is "turn-around" behavior. In the second stage, the Vth moves from -1.63 V to -2 V, overwhelming the NBTI effect that results in the trapping of positive charges at the dielectric/Poly-Si interface states and generating grain-boundary trap states and oxide traps.
authors.forename: Sang Sub
authors.initials: SS
authors.lastname: Kim
authors.forename: Pyung Ho
authors.initials: PH
authors.lastname: Choi
authors.forename: Do Hyun
authors.initials: DH
authors.lastname: Baek
authors.forename: Jae Hyeong
authors.initials: JH
authors.lastname: Lee
authors.forename: Byoung Deog
authors.initials: BD
authors.lastname: Choi