title: Synchronous OEIC Integrating Receiver for Optically Reconfigurable Gate Arrays.
abstract: A monolithically integrated optoelectronic receiver with a low-capacitance on-chip pin photodiode is presented. The receiver is fabricated in a 0.35 μm opto-CMOS process fed at 3.3 V and due to the highly effective integrated pin photodiode it operates at μW. A regenerative latch acting as a sense amplifier leads in addition to a low electrical power consumption. At 400 Mbit/s, sensitivities of -26.0 dBm and -25.5 dBm are achieved, respectively, for λ = 635 nm and λ = 675 nm (BER = 10(-9) ) with an energy efficiency of 2 pJ/bit.
authors.affiliation: Institute of Electrodynamics, Microwave and Circuit Engineering, Vienna University of Technology, Gußhausstraße 25/354, Vienna 1040, Austria. csanaz@unizar.es.|Group of Electronic Design, Aragón Institute of Engineering Research, Universidad de Zaragoza, Pedro Cerbuna 12, Zaragoza 50009, Spain. csanaz@unizar.es.
authors.forename: Carlos
authors.initials: C
authors.lastname: Sánchez-Azqueta
authors.affiliation: Institute of Electrodynamics, Microwave and Circuit Engineering, Vienna University of Technology, Gußhausstraße 25/354, Vienna 1040, Austria. bernhard.goll@tuwien.ac.at.
authors.forename: Bernhard
authors.initials: B
authors.lastname: Goll
authors.affiliation: Group of Electronic Design, Aragón Institute of Engineering Research, Universidad de Zaragoza, Pedro Cerbuna 12, Zaragoza 50009, Spain. scelma@unizar.es.
authors.forename: Santiago
authors.initials: S
authors.lastname: Celma
authors.affiliation: Institute of Electrodynamics, Microwave and Circuit Engineering, Vienna University of Technology, Gußhausstraße 25/354, Vienna 1040, Austria. horst.zimmermann@tuwien.ac.at.
authors.forename: Horst
authors.initials: H
authors.lastname: Zimmermann
keywords: integrated optoelectronics; integrated pin photodiode; integrating receiver