title: Hybrid Integration of Graphene Analog and Silicon Complementary Metal-Oxide-Semiconductor Digital Circuits.
abstract: We demonstrate a hybrid integration of a graphene-based analog circuit and a silicon-based digital circuit in order to exploit the strengths of both graphene and silicon devices. This mixed signal circuit integration was achieved using a three-dimensional (3-D) integration technique where a graphene FET multimode phase shifter is fabricated on top of a silicon complementary metal-oxide-semiconductor field-effect transistor (CMOS FET) ring oscillator. The process integration scheme presented here is compatible with the conventional silicon CMOS process, and thus the graphene circuit can successfully be integrated on current semiconductor technology platforms for various applications. This 3-D integration technique allows us to take advantage of graphene's excellent inherent properties and the maturity of current silicon CMOS technology for future electronics.
authors.affiliation: Department of Electrical Engineering, KAIST , Daejeon 305-701, Republic of Korea.
authors.forename: Seul Ki
authors.initials: SK
authors.lastname: Hong
authors.affiliation: Department of Electrical Engineering, KAIST , Daejeon 305-701, Republic of Korea.
authors.forename: Choong Sun
authors.initials: CS
authors.lastname: Kim
authors.affiliation: Department of Materials Engineering, Korea Aerospace University , Gyeonggi-do 412-791, Korea.
authors.forename: Wan Sik
authors.initials: WS
authors.lastname: Hwang
authors.affiliation: Department of Electrical Engineering, KAIST , Daejeon 305-701, Republic of Korea.
authors.forename: Byung Jin
authors.initials: BJ
authors.lastname: Cho
keywords: CMOS; circuit; graphene; hybrid; integrated; transistor